This dissertation is supported by the following projects : national foundation for science research on the theory of sub - deep micro and super high speed multimedia chip design " ( no . 6987601 0 ) national foundation for high technology research & development " interface of vlsi ip core and related design technology " ( 863 - soc - y - 3 - 1 ) a - national r & d programs for key technologies for the 9th five - year plan research on high level language description and embedded technology for mcu " ( 97 - 758 - 01 - 53 - 08 ) national foundation for the ministry of education , prc " research on the optimal theory and methodology of soc software / hardware integration co - design and co - verification " ( moe [ 2001 ] 215 ) national foundation for science and technology publication " design of interface circuit for computer with verilog " [ ( 99 ) - f - l - 011 ] a deep research on system level design methodology of 1c and the design technology of mcu - ip and interface ip are made in this dissertation . the main work and achievements are as follows : 1 building block principle and the building block component maximum principle are brought forward based on the research of developing history of ic design 本文基于以下科研項(xiàng)目撰寫(xiě):國(guó)家自然科學(xué)基金“深亞微米超高速多媒體芯片設(shè)計(jì)理論的研究” ( 69876010 )國(guó)家863計(jì)劃“超大規(guī)模集成電路ip核接口及相關(guān)設(shè)計(jì)技術(shù)” ( 863 - soc - y - 3 - 1 )國(guó)家“九五”重點(diǎn)科技攻關(guān)“ mcu高層語(yǔ)言描述及其嵌入技術(shù)研究” ( 97 - 758 - 01 - 53 - 08 )國(guó)家教育部“ soc軟硬件集成協(xié)同設(shè)計(jì)和驗(yàn)證優(yōu)化理論和方法研究” (教技司[ 2001 ] 215 )國(guó)家科技學(xué)術(shù)著作出版基金“ verilog與pc機(jī)接口電路設(shè)計(jì)” ( 99 - f - 1 - 011 )論文的主要工作和取得的成果如下: 1 、在研究集成電路設(shè)計(jì)方法學(xué)發(fā)展歷史的基礎(chǔ)上,提出了設(shè)計(jì)的積木化原則和積木元件最大化原則。